May 2008 - Posts

AMD-Virtualization (AMD-V) provides a Secure Virtual Machine (SVM) processor architecture that allows software vendors to implement secure virtualization solutions and reduce software code complexity. Here are AMD-V SVM architecture highlights commonly mentioned with reference to virtualization software:

  • Host Mode - allows a hypervisor, or more generically a Virtual Machine Monitor (VMM), to execute with the highest level of privilege. This execution mode is sometimes referred to as Ring -1 mode.
  • Guest Mode - allows a guest operating system to execute in privileged-mode (Ring 0) and the application stack running in user-mode (Ring 3).
  • Eight SVM instructions - support virtualization, including VMRUN which enables the context switch, or world switch, from Host Mode to Guest Mode to load and execute a new guest operating system.
  • Virtual Memory Control Block (VMCB) data structure - contains guest state information, including settings that define intercepts and instructions that cause transitions from Guest Mode to Host Mode.
  • Address Space Identifier (ASID) - a unique identifier assignment in a Translation-Lookaside Buffer (TLB) to distinguish between co-existing host and guest entries and help to improve the performance of a context switch. A TLB is a processor cache that holds virtual-to-physical memory address mappings. Each processor core has an individual TLB.
  • Simultaneous support for 16-bit, 32-bit, and 64-bit guest operating systems.
  • Rapid Virtualization Indexing or Nested Paging - provides processor-powered translation of the guest memory address space to the host virtual address space, and finally to the host physical address space.

The Rapid Virtualization Indexing feature of the AMD-V SVM architecture is not leveraged in the initial release of Hyper-V.

You can obtain in-depth information on AMD-V, from the AMD64 Architecture Tech Docs at http://www.amd.com/us-en/Processors/DevelopWithAMD/0,,30_2252_739_7044,00.html.

Intel Virtualization Technology (Intel VT) provides a processor architecture that supports virtualization software applications through a set of extensions referred to as Virtual Machine Extensions (VMX). Here are Intel VT VMX highlights commonly mentioned with reference to virtualization software:

  • VMX Root operating mode - allows a hypervisor or VMM to execute in fully privileged mode.
  • VMX Non-Root operating mode - allows a guest operating system to execute in Ring 0 and the application stack in Ring 3.
  • Ten VMX instructions - support virtualization, including VMLAUNCH which enables the context switch to load and execute a new guest operating system.
  • Virtual Memory Control Data Structure (VMCS) - contains guest and host state information, as well as VMX control fields used to manage the transitions between VMX Root and VMX Non-Root operating modes.
  • Virtual Processor Identifier (VPID) - a unique identifier assignment stored in the VMCS to distinguish between co-existing host and guest entries. TLB entries are tagged with the appropriate VPID value, reducing the impact during context switches by not requiring a flush and reload of the TLB. Simultaneous support for 16-bit, 32-bit, and 64-bit guest operating systems.
  • Extended Page Tables (EPT) - provide processor-powered translation of the guest physical memory address space to the host physical address space.

Like in the case of AMD-V Rapid Virtualization Indexing, Hyper-V does not leverage the Intel VT Extended Page Tables features in the initial release. Bottom line, Intel VT and AMD-V architectures offer much similar functionality to virtualization software application developers, although their feature implementation, nomenclature, and performance may differ from each other.

Here is a reference document from Intel on this topic: http://softwarecommunity.intel.com/isn/downloads/virtualization.pdf. You can also get more detailed information on the Intel VT from the Intel 64 and IA-32 Architectures Software Developer's Manuals at http://www.intel.com/products/processor/manuals/.